Addressing modes#
x86-64 supports a single rich form:
[base + index*scale + displacement].
Plain dereference.
mov rax, qword [rbx]
Dereference plus offset.
mov rax, qword [rbx + 8]
Base plus scaled index.
mov rax, qword [rbx + rcx*8]
Full form: base, scaled index, plus a displacement.
mov rax, qword [rbx + rcx*8 + 16]
RIP-relative addressing (position-independent code).
mov rax, qword [rel msg]
scale must be 1, 2, 4, or 8. base and index are any
GPR; rsp cannot be the index.
ARM64 addressing modes.
Base.
ldr x0, [x1]
Base plus offset.
ldr x0, [x1, #16]
Base plus register index.
ldr x0, [x1, x2]
Base plus shifted index.
ldr x0, [x1, x2, lsl #3]
Pre-index: update the base before the load.
ldr x0, [x1, #16]!
Post-index: update the base after the load.
ldr x0, [x1], #16