Alignment

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Alignment#

The CPU prefers naturally-aligned accesses (a 4-byte read from a 4-byte-aligned address). x86-64 tolerates misaligned scalar loads but penalises them; SSE / AVX faults on most misaligned loads. ARM64’s strict mode faults on any misaligned load.

The operator aligns data with .align N.

section .data
.align 8
counter: dq 0

A vector that must be 16-byte aligned for SSE / AVX.

section .rodata
.align 16
mask:    dq 0xff, 0xff

The stack must be 16-byte aligned at every call.

References#

  • Sizes for the widths whose alignment matters.

  • Runtime for the section directives and ABI rules.

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