I2C

I2C#

Two-wire multidrop. SDA and SCL plus ground; the lines idle high through pull-ups and every device pulls low to talk. Addresses on the wire let many slaves share the same two pins. The sensor and EEPROM bus on most boards; the operator scans the address space, then reads or writes registers.

Wires#

Signal	Direction	Purpose
`SDA`	Bidirectional	Serial data; open-drain.
`SCL`	Master out (clock stretching allowed)	Serial clock; open-drain.
`GND`	Reference	Ground.

Both lines need pull-up resistors to Vcc (typically 4.7 kΩ at 100 kHz, 2.2 kΩ at 400 kHz). On a board the operator will find them populated; on a bare wire the operator adds them.

Wire format#

Logic levels are CMOS, 3.3 V or 5 V (the bus is mixed-voltage tolerant within reason). All transitions reference SCL edges.

Start condition. SDA falls while SCL is high.
Address frame. 7 bits of slave address, then 1 bit R/W (0 = write, 1 = read), then an ACK from the slave.
Data frame(s). 8 bits, MSB first, then an ACK from the receiver. Repeat as many as the transaction needs.
Stop condition. SDA rises while SCL is high.
Repeated start. A new start without an intervening stop; used to switch direction within a transaction.

Speeds are 100 kHz (standard), 400 kHz (fast), 1 MHz (fast-mode plus), 3.4 MHz (high-speed), and 5 MHz (ultra-fast). 10-bit addressing exists but is rare.

        sequenceDiagram
    participant M as Master
    participant S as Slave (addr 0x50)
    M->>S: START + 0x50 + W
    S-->>M: ACK
    M->>S: register address byte
    S-->>M: ACK
    M->>S: REPEATED START + 0x50 + R
    S-->>M: ACK
    S-->>M: data byte
    M-->>S: NACK (end of read)
    M->>S: STOP

Pads#

Label	Meaning
`SDA`, `SDI`	Serial data.
`SCL`, `SCK`, `CLK`	Serial clock.
`INT`	Optional interrupt line; not part of the bus itself.
`ADDR`, `A0`-`A2`	Slave address select pins on EEPROMs and some sensors.

The Qwiic and STEMMA-QT 4-pin JST-SH connector is the operator’s fastest path onto a hobby board’s I2C bus (GND, Vcc, SDA, SCL).

Tools#

Tool	Effect
`i2c-tools` (`i2cdetect`, `i2cdump`, `i2cget`, `i2cset`)	Linux userspace; scan and poke a bus exposed through `/dev/i2c-N`.
`Bus Pirate`, `FT2232H`, `MCP2221A`	USB-to-I2C bridges.
Logic analyzer (`Saleae`, `PulseView`)	Decode I2C traffic with start, stop, and ACK markers.
`smbus2` (Python)	Scripted register reads and writes against `/dev/i2c-N`.

References#

NXP UM10204 I2C-bus specification and user manual.
man 8 i2cdetect, man 8 i2cdump, man 8 i2cget, man 8 i2cset.
SPI for the high-speed point-to-point alternative.
Wire for the one-line minimalist cousin.
Sigrok I2C decoder.

I2C

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