SPI

SPI#

Synchronous serial. Four wires plus ground; one side drives the clock, both sides shift bits on every edge. No addressing on the wire — the master selects a slave by pulling its chip-select low. The bus on every SPI flash, EEPROM, SD card, and a fair share of sensors. Pull firmware off an SPI flash in a few hundred milliseconds with a clip and a programmer.

Wires#

Signal	Direction	Purpose
`SCLK` (`SCK`, `CLK`)	Master out	Clock; defines bit timing.
`MOSI` (`SDO`, `DIN`)	Master out	Master Out, Slave In.
`MISO` (`SDI`, `DOUT`)	Master in	Master In, Slave Out.
`CS` (`SS`, `CE`)	Master out	Chip select, active low; one per slave.
`GND`	Reference	Ground.

Wire format#

Logic levels are CMOS, typically 3.3 V or 1.8 V. The master holds CS high to idle, pulls it low to start a transaction, drives SCLK, and shifts bytes MSB-first on MOSI while sampling MISO.

Four modes set the clock polarity (CPOL) and phase (CPHA).

Mode	CPOL	CPHA	Idle	Sample on
0	0	0	Low	Leading (rising) edge
1	0	1	Low	Trailing (falling) edge
2	1	0	High	Leading (falling) edge
3	1	1	High	Trailing (rising) edge

Speeds run from a few hundred kHz on a slow sensor to 100+ MHz on a quad-SPI flash. Most parts default to mode 0.

        sequenceDiagram
    participant M as Master
    participant S as Slave
    M->>S: CS low
    M->>S: SCLK + MOSI byte (command)
    S-->>M: MISO byte (response)
    Note over M,S: Repeat for as many bytes as the command requires
    M->>S: CS high (end transaction)

Pads#

SPI flash and EEPROM chips are the operator’s most common SPI target. The 8-pin SOIC 25xx flash family has a fixed pinout that a SOIC-8 test clip mates to without desoldering.

Pin	Signal
1	`CS#`
2	`MISO` (`DO`)
3	`WP#` (write protect)
4	`GND`
5	`MOSI` (`DI`)
6	`SCLK`
7	`HOLD#` (or `RESET#`)
8	`VCC`

Tools#

Tool	Effect
`flashrom`	Dump and write SPI flash; the operator’s first reach for firmware extraction.
`CH341A` programmer, `Bus Pirate`, `FT2232H`	USB-to-SPI bridges that drive the bus from a host.
SOIC-8 test clip (`Pomona 5250`)	Mate to a flash chip in-circuit without desoldering.
Logic analyzer (`Saleae`, `PulseView`)	Decode SPI traffic in flight.
`spidev` (Linux)	Userspace SPI access on Raspberry Pi and similar boards.

References#

JEDEC JESD216 (Serial Flash Discoverable Parameters).
I2C for the addressed multidrop alternative.
UART for the async serial neighbor.
flashrom supported chips.
Sigrok SPI decoder.

SPI

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