Types#
Assembly does not have types; it has sizes and addressing
modes. Every memory access spells the operand width (byte,
word, dword, qword on x86-64); every arithmetic
instruction has a size variant. The operator “types” data by
choosing the right size suffix and the right mnemonic.
For register sizes, see Registers. For operators that act on these sizes, see Operators.
Pages#
Byte / word / dword / qword on x86-64 and ARM64.
The mnemonic / flag / jump split between signed and unsigned arithmetic.
Little-endian on x86-64 / ARM64; bswap / rev for
network byte order.
Natural alignment; .align N; stack-alignment ABI rule.
[base + index*scale + disp] on x86-64; ARM64 forms.
Null-terminated bytes; rep movsb / stosb family.
Hand-tracked offsets; NASM struc.
Computing an addressing-mode expression without dereferencing.
References#
Registers for register sizes and aliases.
Operators for the instruction surface that uses these sizes.
Control flow for signed vs unsigned comparison and the jump matrix.
Runtime for the ELF section layout the assembler emits these sizes into.